Various types of amplifier circuits have been developed for a myriad of applications, such as including audio applications, video applications and communications applications to name a few. Some core considerations for most amplifier designs are the ability to support a wide bandwidth and provide low distortion in the amplified output signal.
A typical amplifier includes an input buffer that provides a buffered input signal to bias one or more subsequent stages according to the input signal. To implement the buffering, the input buffer receives biasing signals that establish a level at which the buffered signal is provided. Typically, the biasing signals are matched, or at least are intended to be matched.
One type of amplifier, namely a diode input current feedback amplifier, includes an input buffer having diodes that form part of the input buffer. This type of amplifier provides a straightforward design that generally provides a lower offset when compared to many existing alternative input buffer configurations. This input buffer configuration thus is useful in many high speed amplifier applications.
Prior art FIG. 1 depicts a basic configuration for a diode input current feedback amplifier 10. In the example of FIG. 1, the amplifier 10 includes an input buffer 12 that includes non-inverting and inverting inputs 14 and 16, respectively. The input buffer 12 is biased by a pair of current sources, indicated at I1 and I2. I1 and I2 are respectively coupled to V+ and V−, where V+ is greater than V−. The basic configuration of the input buffer 12 further includes a pair of diodes D1 and D2 coupled between the respective current sources I1 and I2. The non-inverting input 14 is coupled to a node that interconnects the respective diodes D1 and D2. A pair of transistors Q1 and Q2 are coupled across the diodes D1 and D2 to bias respective current mirrors 18 and 20. The inverting input 16 is coupled between Q1 and Q2. The mirrors 18 and 20 are coupled to bias an output stage 22 of the amplifier that provides a corresponding output at 24.
In a typical amplifier, the bias currents I1 and I2 are designed to be substantially identical currents for biasing the input buffer 12. Any difference or mismatch between I1 and I2 can adversely affect operation and performance of the amplifier 10. For instance, process variations associated with fabricating the amplifier 10, including the current sources, can result in a mismatch between I1 and I2. A mismatch between I1 and I2 appears at the input 14 of the input buffer 12, either sourcing or sinking current relative to circuitry coupled at 14. Accordingly, circuitry coupled to drive the input at 14 and 16 can be adversely affected when such a mismatch exists. As larger bias currents I1 and I2 are utilized, a corresponding mismatch tends to increase in magnitude. Consequently, a large mismatch between I1 and I2 causes an associated voltage offset at the output 24, which may be an amplified version of the offset at 14.
Accordingly, while various approaches exist for implementing input buffers, it is desirable to provide additional systems and methods for improved bias matching.